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The Argument for New Vs Refurbished Used Photoresist Process Equipment

In the past we’ve discussed “Lowering the Cost of Ownership (COO) of Spin Process Tools.” but we did not discuss the fact that the customer does have an option to purchase a used, “used and… Continue reading The Argument for New Vs Refurbished Used Photoresist Process Equipment

The Photolithography Process and Its Use In Wafer Level Chip Scale Packing (WLCSP)

The basic concept of Wafer Level Chip Scale Packaging (WLCSP) is to employ more or less the same techniques used in making a semiconductor device to create its packaged form. For convenience we will define… Continue reading The Photolithography Process and Its Use In Wafer Level Chip Scale Packing (WLCSP)

Creating Value With “Track” Tools in Back end of the Line (BEOL)

The Semiconductor Industry has for years followed the path of “Moore’s” Law. Gordon Moore’s forecast that the industry would every 18 months double the number of transistors in a given area, thereby increasing value while… Continue reading Creating Value With “Track” Tools in Back end of the Line (BEOL)

Why Back End of Line (BEOL) Photoresist “Track” Tools are and must be Different from Front End of Line (FEOL) Photoresist Processors

In earlier writings we have discussed cost of ownership issues (COO) related to photoresist processing tools. In this entry, we will discuss the important functional differences between tools generally intended for the FEOL, and those… Continue reading Why Back End of Line (BEOL) Photoresist “Track” Tools are and must be Different from Front End of Line (FEOL) Photoresist Processors

Lowering the Cost of Ownership (COO) of Spin Process Tools

In our last BLOG we discussed the need to lower the COO of the tools of production for those who are both designing and building their chips. The issue that we attempt to address here… Continue reading Lowering the Cost of Ownership (COO) of Spin Process Tools

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